Optimizing RGB to Grayscale, Gaussian Blur and Sobel-Filter operations on FPGAs for reduced dynamic power consumption

Presented in 3rd IEEE AIIoT 2024

Paper

Abstract

The conversion of pixels from their RGB to Grayscale formats is a crucial first step in numerous Image Pre-Processing, Computer Vision, and as highlighted here, edge detection modules. This paper presents an implementation of the Shift-Add Multiplication algorithm for efficient constant multiplications of the NTSC formula weights for RGB to Grayscale conversion on FPGAs. The proposed module is designed to be reconfigurable to both fixed-point and floating-point formats, providing flexibility in precision and resource utilization based on application requirements. Additionally, a Python script was developed to automate the generation of Verilog code for fractional constant multiplications, as proposed in this study. Pipelined modules for Gaussian Blur and the Sobel-Filter were also designed to enable the development of a complete real-time edge detection system on FPGAs. The findings reveal that Shift-Add algorithm based multiplier’s significantly reduce dynamic power consumption as compared to the use of the built-in DSP blocks on FPGA boards while performing constant multiplications for RGB to Grayscale conversion.

@INPROCEEDINGS{10574796,
  author={Rout, Nikhil and Jean Jenifer Nesam, J},
  booktitle={2024 3rd International Conference on Artificial Intelligence For Internet of Things (AIIoT)}, 
  title={Optimizing RGB to Grayscale, Gaussian Blur and Sobel-Filter operations on FPGAs for reduced dynamic power consumption}, 
  year={2024},
  volume={},
  number={},
  pages={1-6},
  keywords={Power demand;Codes;Image edge detection;Heuristic algorithms;Gray-scale;Aerodynamics;Real-time systems;Table lookup;Hardware design languages;Field programmable gate arrays;Constant Multiplier;FPGA;Gaussian Blur;Image edge detection;Real-time systems;RGB to Grayscale conversion;Shift-Add Algorithm;Sobel-Filter},
  doi={10.1109/AIIoT58432.2024.10574796}}