Accelerating AI on RISC-V with the Vortex GPGPU Tensor Core Extension

Scheduled: Feb 26, 2026 7:00–8:00 AM US Pacific Time (Virtual)

This session introduces the Tensor Core Unit (TCU) extension for the open-source RISC-V based Vortex GPGPU framework. We’ll explore the architectural motivations behind accelerating matrix-multiply-accumulate instructions critical to deep learning workloads, and compare systolic array versus tensor core approaches. We’ll then dive deep into our configurable mixed-precision Fused Dot Product (FEDP) microarchitecture, which now includes support for sparsity and microscaling. The talk will also include a live demonstration where attendees can learn how to configure, build, and run their own kernels on the Vortex TCU, and explore how different GPGPU design trade-offs impact performance using an out-of-the-box FlashAttention kernel implementation.